Efficient Computer launches dev kit for processors that are 100x more energy efficient

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Efficient Computer, a company building general-purpose processors that could be 100 times more energy efficient than today’s rivals, launched its first dev kit today.

Pittsburgh, Pennsylvania-based Efficient Computer announced the availability of the Electron E1 Evaluation Kit (EVK)—offered directly to early access developers as well as in the cloud—a complete, ready-to-use platform for creating, testing, and optimizing software for the Electron E1 processor.

The new EVK enables developers to design and bring up the next generation of applications, providing up to 100 times greater energy efficiency than current conventional low-power legacy processors.

“Developers who participate in our early access program can use our hardware and software to develop a wide variety of applications that are infeasible today due to the limitations of existing processors: inefficient use of energy, the lack of general-purpose applicability, and an inability to build systems that meet the needs of the next generation of intelligence applications,” said Brandon Lucia, CEO. “We are eager to see what users will unlock now that they are unencumbered by the limitations of these legacy processors.”

Electron E1 EVK Benefits

Electron E1 processor is built on Efficient’s Fabric architecture. Source: Efficient Computer.

The Electron E1 processor is built on Efficient’s Fabric architecture—an innovative spatial dataflow design that executes general-purpose code and eliminates the costly overheads of traditional processors, all while ensuring the familiar software experience developers expect.

Built to demonstrate energy-efficient performance for important use cases, the E1 processor on the E1 EVK enables rapid software bring-up, power characterization, and system integration, paired with a software platform that is familiar to use and drops into existing toolchains. Designed with Efficient’s focus on energy efficiency in mind, the EVK allows developers to isolate the specific parts of the board they need so they can accurately model energy usage.

With built-in instrumentation and Arduino-compatible headers, developers can quickly test their applications, transfer existing code onto Efficient’s hardware, and prepare for volume production.

The Electron E1 EVK also gives developers broad access to explore the E1 processor’s potential for diverse applications such as energy-efficient edge AI and ML inference, signal processing, data analytics, sensor fusion, radar, AR, and more.

In addition, developers will have access to the E1 Cloud EVK, an easy and convenient alternative to having the actual hardware in hand. This allows them to perform all the tasks they would normally handle with physical hardware, but within Efficient Computer’s hosted environment. Access to this platform will open in January 2026.

The Electron E1 EVK includes an Electron E1 Evaluation Board, pre-loaded demo firmware, quick-start documentation, and SDK access.

Origins

The design of Efficient’s E1 processor. Source: Efficient Computer

Lucia said in an interview with GamesBeat that the team came together a decade ago — assembled from researchers at Carnegie Mellon University. At the time, they were doing ultra-low power system development for highly constrained systems like those that have to be used in space using battery power. That meant they had to be a lot more energy-efficient than rivals at the time like Arm-based computers, which were marketed as low-power computing systems.

“What we found is that so much of computing is wasteful and inefficient,” Lucia said. “What it boiled down to was we could only do a limited set of capabilities for those applications because you’re just limited by power. You just can’t get more power. You can’t get more energy, and so you’re stuck. You have to cut features, or, if you’re on a battery, have to cut lifetime.”

He added, “We got frustrated with that we looked at where there are the inefficiencies in the existing architectures,” designed in the 1940s.

Those architectures were rooted in the design created by physicist John von Neumann, who designed the architecture behind modern computers. A von Neumann computer architecture is one where both program instructions and data are stored in the same memory and accessed through a single pathway.

“There are a lot of inefficiencies in how those architectures handle instruction control, which means telling the processor internal circuitry what to do. And then also in dealing with data movement and data supply.”

He added, “If you’re going to do an operation on your processor, what is it doing the operation on? Somewhere inside your processor, there’s a little circuit that says, ‘Do an addition of two numbers.’ And so you need to tell it do the addition. You need to configure the internal circuitry to mean addition, and then you need to get the two numbers that you’re adding together.”

The analysis showed that getting those two numbers, configuring the internal circuitry and instructing the machine — all of that work accounted for over 99% of the energy that a modern CPU used at the time. The team repeated the exercise for multiple architectures. And the more they looked, the more they found architectures were optimized for performance to the detriment of energy efficiency.

Efficient Computer pushed forward on the premise that this isn’t an “either or” choice. Rather, it believes it’s not necessary to forfeit efficiency to get high performance.

“We can design for efficiency and get a really killer fast processor, but, and this is where the 100 times energy efficiency comes in. We need to fundamentally change the way that we design the architecture of the machine.”

Efficient Computer’s post-von Neumann processor

Efficient Computer has been in the works for a decade. Source: Efficient Computer

In designing its challenge to modern processor design, Efficient Computer tackled both hardware and software.

“Our architecture exposes something called spatial data flow, which is a fundamentally new way of mapping software instructions into hardware for execution. And when you put those pieces together, the compiler and the abstraction between hardware and software and the implementation of the architecture in micro architectural circuitry that we’ve developed — you put those things together, that’s what delivers the 100 times efficiency that you get,” he said.

“We’re eliminating everything we I can. We’re eliminating the instruction fetching cost, the internal circuit reconfiguration cost, and the data movement cost, which are over 99% of the energy consumed by the typical von Neumann processor. We get rid of those costs because we’re doing things differently, and that’s where we get our 100 times.”

Lucia thinks of this as the post-von Neumann architecture.

“Our particular the term of art that we prefer is a ‘spatial data flow architecture.’ And that’s an alternative, with spatial being the keyword there. Spatial data flows are an alternative to von Neumann.”

Much like GPUs, Efficient Computer can handle tasks in a kind of a hardware array, where work can be done in parallel, instead of in a serial fashion with von Neumann processing.

“It’s a spatial mapping of the computation,” he said. “It can move data directly from one hardware unit to another hardware unit. And that’s a very parsimonious way of communicating between hardware units,” he said.

I said that sounded a lot like the parallelism of GPUs. He noted that parallelism is similar. But he also said the GPUs don’t just do a single operation for each instruction, per von Neumann. Rather, they do what is called a vector of operations. So for each time you do an instruction, you might be doing 32 or 64 or 128 operations for that instruction, he said.

When it comes to the cost of one operation, on a CPU, it is one unit of cost for one operation. For a GPU, it’s one unit of cost for up to 128 operations. But you have to output the 128 values to another location, and that can drive up cost. That’s expensive.

“We’re quite different from GPUs in that we don’t rely on a vector abstraction like that. We can do vector computation very efficiently, but we don’t depend on that, and we have a much more efficient story about data movement. And so when we compare, an application versus application running on silicon, when we compare to a GPU, we’re vastly more efficient,” Lucia said.

With neural network processors, there are similar issues.

“For that reason, comparing a neural network processor, there are a lot of similarities. The biggest similarities are that we’re doing this spatial mapping of computation across functional units that communicate directly. The biggest difference, and this is extremely, extremely important, is that we are general-purpose,” Lucia said. “So we have the full power of software. We can do arbitrary C programs. We could just run it on our hardware with no special attention. That’s the power of hardware/software co-design, and that’s one of the things that we bring to bear as a big advantage over like NPUs or GPUs or TPUs or all these different PUs that are out there.”

Lucia said, “Now we can do any computation as AI evolves. The NPU is great today, but will it be great tomorrow? That’s what worried us in the beginning, when we were thinking about how we solve this efficiency problem.”

He said the solution is not to over-specialize for what’s today.

“It’s to create a platform that’s extremely efficient and high performance, and it handles what’s coming tomorrow. And that’s really core to what we’re doing at Efficient Computer. It’s a combination of extreme energy efficiency without giving up on the generality of software. That fosters the next generation of AI and other applications. It’s super important to do the general-purpose processor,” he said.

Lucia said that, as a general-purpose processor, Efficient Computer processors can run software that comes from any area of the market.

Key features of the Electron E1 EVK

▪ Equipped with the Electron E1 processor, providing best-in-class efficiency for general-
purpose computing

▪ Pre-programmed demo showcasing low-power operation and serial interfaces
▪ Plug-and-play setup via USB—just power on to start measuring energy
and performance
▪ Integrated current sensors measure total system and chip-level power
▪ Real-time energy data streamed over USB in CSV format for easy profiling
▪ Switches and jumpers to isolate the E1 for high-accuracy energy measurement
▪ 72 GPIO pins exposed for general-purpose use
▪ Compatible with Arduino UNO and MKR-footprint shields via onboard level shifters
▪ Built-in switches for disconnecting subsystems and maximizing system energy
▪ USB-based programmer supports fast flashing and debugging
▪ Multiple power input options: USB, battery, external supply, or Arduino VIN
▪ Low-voltage operation (1.8–5.5V) ideal for energy-constrained environments

For more technical details about Efficient Computer’s hardware and software, visit
docs.efficient.computer.

Availability

Developers who are interested in the Electron E1 EVK will need to first join the Efficient
Early Access Silicon Partnership Program. Please reach out to [email protected].

Developers who are interested in access to the Cloud EVK can visit Efficient’s website and sign up.

Efficient Computer will be at the 2026 Consumer Electronics Show (CES) in Las Vegas, Nevada, January 6–9, where attendees can learn more about the Electron E1 EVK from Efficient Computer team members as well as see interactive demos like gesture detection on the E1 EVK running a LiteRT model. They will be at The Venetian, Hall A, Booth 51432.

Application focus

“As a small company and a startup that is going on four years old, we need to be focused,” Lucia said. “We need to be pushing our technology to where the advantage really pans out in the biggest way possible for our customers. So we’ve been focused on a few key areas where we’ve gotten a lot of uptake and a lot of traction — infrastructure, observability and industrial automation, the automotive and robotics areas, and space and defense applications.

“We’re beginning to see some activity in VR, AR, XR wearables and consumer applications. Those are the biggest areas where we see the advantage that our technology provides,” Lucia said.

Automotive robotics is a big opportunity, where the code handles AI processing but there is a lot of other code that handles optimal control, modeling, predictive control, state estimation, and other variety of other algorithms.

Some of those tasks don’t fit neatly in neural processing units or graphics processing units, Lucia said.

“For those types of robotics applications, it’s like you can over-perform on the AI part if you have an NPU. But if half your code is running all this other stuff, you’re limited, in the end-to-end total benefit that you can get. You’re limited to a two times total benefit if you can only address half of the energy consumption in your robot.”

He added, “We eliminate that limitation. We allow the robot to run its code across all those areas on our chip. And that’s one of the reasons we’re so excited about these kinds of areas that are in the physical world. That’s really motivating for us.”